Notes as I view <a href=http://sms.cam.ac.uk/media/1743801>this</a>.
This is a very good talk where they describe their modifications to the open MIPS architecture.
They cite <a href=http://www.cl.cam.ac.uk/techreports/UCAM-CL-TR-850.pdf>this</a> as a definition of the modified architecture.
<p>What is “Intel MPX”??
Tags are on physical memory.
When you swap out a page it is at least easy to find the caps.
The instruction “csetlen” produces a cap for a subrange of a memory cap.
CCured??
<a href=www.cheri-cpu.org>central entry</a>.
<p>I can imagine how to implement malloc in CHERI, but not free.
I see no efficient revocation mechanism.
<p>Keykos memory capabilities can be sent to other domains.
CHERI cannot, at least as described in the talk.