The IBM 360 Model 67 used a small hack to offload the TLB.
The 67 TLB was called the “Blaauw Box” (Gerrit Blaauw) then.
Considering that the PC values would typically remain in the same virtual page for stretches of time, it seemed strategic to avoid going back to the TLB each time only to find again the same address of the real page that held the instructions.
To this end the “real” PC (PSW in 360 jargon) held the real address of the instructions and a less active VPC(?) held the logically correct value of the high 32−12 bits of the PC.
The VPC value would be needed when:
- a BALR instruction was to perform a subroutine call and yield the old PC value to enable the subroutine to return.
- the hardware interrupt process was required to report the PC of the interrupted program.
An overflow into the page number portion of the real PC would require reconsulting the TLB to locate the real address of the next instruction.
This hack avoided about 1/2 of the TLB load.
Considering that most 360 effective addresses are computed as the sum of one of the general registers, and a 12 bit constant offset from the instruction stream, it would seem possible to pull this same trick on each of the 16 general registers.
This was not pursued however; it would have been a much bigger disruption of the CPU which was mainly a rework of the model 65.