Jonathan Swift wrote about a place that battled fiercely over whether it was proper to eat your hard boiled eggs starting from the big end or the little end. Computers address bytes within a word and must decide which end of the word holds the byte with the lowest address. Don Knuth noticed the connection and resurrected Swift’s terms—the little endians and big endians—to name the two camps. See “Swift” and other interesting material in this note. Here is another entertaining and useful note.
Some processors are ambidextrous. The Motorola 88K in particular, normally a big-endian machine, has a mode in which programs find the bytes in a word numbered from the right end, even though most software for the that machine uses the opposite mode where the they are numbered from the left. It is relevant that the data bus for the Motolola 88K was 32 bits wide. The purpose of this note is to describe the 88K circuitry involved with this mode for it is more efficient than that used by the Alpha, I believe. I must first say that my information on the Alpha is very indirect and thus suspect.
The Alpha, I think, swaps bytes end-for-end as a word is loaded or stored when it is running big-endian code. If 106 appears in a register and that register is stored in RAM, the endian mode is switched, and then reloaded into another register, then the bytes in the two registers are reversed from each other and the registers compare unequal.
If the same is performed on the 88K both registers hold 106 at the end and compare equal. The load and store word operations on the 88K were oblivious to the endian mode. That mode controls the operation of load and store byte and half word. A load byte instruction with effective address 0x100 fetches the word at location 0x100 and extracts the high byte if in big endian mode, and the low byte otherwise. Storing makes the same discrimination. The cost of this hardware feature is in the interpretation of the least significant two address bits. Byte operations flip the low two bytes and 16 bit operations flip the ‘2 bit’ of the address.
There is another small cost: A 64 bit floating register value occupies a pair of adjacent 32 bit general registers. Floating point operations assume that the lower numbered register holds the exponent and high portion of fraction. In big endian mode a load double instruction with effective address 0x200 specifying register 4, would move the word from 0x200 to r4 and from 0x204 to r5. The opposite pairing (0x200 -> r5 — 0x204 -> r4) is used in little endian mode. This way the exponent of the floating value is found at the left end in memory in either mode. It would seem clear from the foregoing that the 88K paid a smaller price for its ambidextrous ability. It was possible to switch each processor independently and dynamically between modes and Keykos did so. Processes that shared data pages but not endian modes were required to accommodate. Text “abcdefghijkl” to one would appear as “dcbahgfedlkji” to the other. The point is that they could accommodate without rebooting the system. There was no issue with instructions for instructions were each 32 bits and came from successive words whose addresses incremented by 4 between executions.
The punch line is to swizzle two or three address lines and not 32, 64 or 128 data lines. I know of no advantage of the latter.
IO devices that came with the Omron 88k Luna were big endian oriented. The first byte from a device was placed in the left end of the word. I don't know if the device controllers were able to do otherwise. This was inconsequential for the disk unless the disk were carried to another system. It would have impacted software for interchange media devices it the software platform intended to us BO to accommodate programs planned for little endian operation.
Regarding advantages of one endianness over another I note that in a big endian system a word taken from a text string may be compared with a similar word from another text string as part of a lexicographic string comparison.