Learning about PCIe (PCI Express)

I think that a growing portion of computer systems will be devoted to moving data within the confines of centimeters to meters. I think that PCIe has made a significant contribution to solving this problem, but I think the design of PCIe has paid too little attention to the problem of trusting the assembled hardware.

PCIe is quite complex. At this point I usually claim that there is a simpler way but I do not claim that here; PCIe is a network design and networks are inherently complex as far as I know. Nonetheless, I have some design proposals for simpler security arguments and perhaps marginally simpler hardware.

PCIe presumes, properly I think, that some manufactures produce hardware specific to the PCIe fabric, and others specialize on the PCIe ‘endpoints’ which perform specialized data processing and need low latency high bandwidth access to other processing components. Various sorts of memory are prominent among these components. Even when the same company does both, and puts their two products on the same chip, complexity dictates a conceptual separation so that we may understand the system. In this case we are:

These notes focus on the last category.

I take this to be the price list for the official documentation. I count up over $100,000 for the documents. Retired, as I am, I have not read the official definitions for PCIe. Such a barrier is itself a reason for suspicion. I wonder if there are anti-trust issues here.

Intel’s Virtualized IO is relevant for what it reveals about PCIe and the x86 IOMMU.
Proposed Plans
PCIe has ideas a bit like Tymnet logic. My proposals push this a bit farther.

Similar worries