ASID’s in the tags of TLBs greatly reduce flushing of the TLB but also make it more expensive. Common segment bits in TLB tags may reduce TLB load but conflict with some strategies for allocating virtual memory to hold shared objects. The PSECTS of TSS prefigured the PIC of Unix. The are shared and can be inserted at different addresses in different spaces. Those data are shared in (real) cache but TLB entries are not shared. The page tables are shared in Keykos, Multics and TSS but perhaps not in Unix.
I quibble here and there with it, but not enough to edit it yet. There is a suggestion that page tables may be swapped out. This is possible but the systems that I know do not do that. When space in RAM is scarce a page table may be sacrificed but not written to disk. If it is needed again, RAM space is reallocated for it and its contents are recomputed, on demand, just as they were when they were new. This strategy greatly reduces either the cost or the complexity of updating the page table when pages frames located by the table are reallocated.