It looks as if Intel has finally been convinced of the virtues of virtualization. There are hundreds of pages at Intel's site with virtualization hype but the above pointer leads to perhaps a complete design description. This seems like the most recent info as of 2006 January.

The changes go well beyond fixing the infamous design bugs that have made virtualization of x86 so difficult and often inefficient. They include much of the function of the SIE instruction introduced on IBM’s main frames of the early '80’s.

As in SIE many control events (traps, interrupts, readings and writings of control registers) are handled without running really privileged code, VMM (= real kernel), but instead are directly performed by the real processor relative to a model of the processor running the guest OS. There are bit maps by which the VMM can select on which control events it wants to intervene. There is an offset value that is applied to the Hz counter, (Time Stamp Counter). There seems to be no synthesis of shadow page tables by hardware.

I have studied the x86 privileged architecture but neither closely nor recently. Skimming the document leads me to think that they have provided useful hardware assists somewhere between IBM’s VMA and SIE.

AMD has its own approach to these issues.