Reading the PowerPC Time Base Register or Pentium Time-Stamp Counter

Chapter 4 of the PowerPC Virtual Environment Architecture describes how to read the 64 bit Time Base Register. On my 400 MHz PowerBook this register ticks at about 25 MHz which I suppose is once each 16 clocks. (This is incompatible with this!) It is reset to 0 upon boot and pauses while sleeping.

Section 2.6.6 of Intel’s volume 3 of IA-32 manual describes the “Time-Stamp Counter”. It counts each HZ.

For access in C this assembler code for the PowerPC provides the unsigned long long register value as TB() and the value of the low unsigned 32 bits as TLl(). An appropriate header would be: 

long long TB(void);
unsigned int TBl(void);
How fast can you read the a 100 MHz PPC clock?

Here is a trivial PPC demo. The shell command gcc -O3 tt.c tb.s compiles the code and its demo and ./a.out runs it.

Here is a PPC program that watches the clock and reports periods of running and suspension. This reveals a large stream of covert information. gcc -O3 td.c tb.s; ./a.out to run it.

For the Pentium this assembler code provides the same function but without the TBl entry. This code invokes and contrasts three timing facilities. I think that I do not understand the “Time-Stamp Counter”. How fast can you read the x86 clock? Perhaps OSX disables the RDTSC instruction by “time stamp disable” bit in CR4, and then interprets it. 
gcc xx.s tt.c -O3 -Wmost
This is assembler code for the 64 bit x86 instruction set. 
gcc -O3 tx86.c tbx86.s -Wall
./.out
yields 
279 45 45 54 45 54 45 54 45 45 54 45 54 45 54 45 45 54 45 54 45 54 45 45 54 45 54 45 54 45 45 54 45 54 45 54 45 45 54 45 54 45 54 45 45 54 45 54 45 54 45 45 54 45 54 45 54 45 45 54 45 54 45 
ave =  52.55
on my MacBook.

Mac X86 Assembler Syntax